Light emitting diode

ABSTRACT

A Semi-conductor light emitting diode comprises closely spaced n and p electrodes formed on the same side of a substrate to form an LED with a small foot-print. A semi transparent U shaped p contact layer is formed along three sides of the top surface of the underlying window layer. The p electrode is formed on the p contact layer centered on the closed end of the U. An n contact layer is formed on an n cladding layer and centered in the open end of the U of the p contact layer. The n electrode is formed on the n contact layer. The n and p electrodes are electrically isolated from one and the other by either a notch or an insulator, situated between the electrodes.

TECHNICAL FIELD

[0001] Light emitting diodes which have metal contracts on the same side of a substrate.

BACKGROUND OF THE INVENTION

[0002] Although the structures of light emitting diodes and the manufacturing processes for making those structures have matured through the years, there remain technical and economic challenges to the industry. Because of the high costs of substrates and growth processes, it is essential to success that the footprint of each device be kept as small as possible consistent with the target light output requirements.

[0003] A particular challenge to reduction of the footprint exists in the case of LED's which employ insulating substrates and metal contacts which are situated on the same side of the substrate. In such structures, there is a tendency for current flowing between the metal contacts to concentrate in a small, lower impedance, preferred path through the light emitting surface. Consequently, much of the light emitting surface is not activated. To date this problem has been addressed by provision of conductive, semi-transparent, window contact layers and by maintaining physical lateral separation of the contacts. Such separation seriously limits the number of devices that can be constructed on a substrate of any given size; and thus is an economic burden to the manufacturer.

DISCLOSURE OF THE INVENTION

[0004] A Light Emitting Diode, in accordance with the present invention, comprises a complementary pair of electrodes and means for isolating their corresponding metal contacts to force current flowing between the contacts to flow more fully throughout the active layer.

[0005] Advantageously, these measures increase the light output efficiency of the device; and permit a higher density of devices on a substrate of any given size.

BRIEF DESCRIPTION OF THE DRAWING

[0006]FIG. 1 is a schematic top view of an LED in accordance with the present invention;

[0007]FIG. 2 is schematic side view of the LED of FIG. 1 taken along line A-A, and

[0008]FIG. 3 is a schematic top view of the layout of four LEDs of FIG. 1 on a substrate.

DETAILED DESCRIPTION

[0009] For purposes of illustration, an LED of FIGS. 1 through 3 is a GaN based structure formed on an insulating substrate. The elements displayed in FIGS. 1 and 3 are essentially to the scale of the illustrative embodiment; however, the elements displayed in FIG. 2 are not presented to scale. The device of FIG. 1 is surrounded by four plus symbols, i.e., 151 through 154, and by a boundary line of the substrate 100 to demonstrate an illustrative foot print of a device on the substrate. FIG. 3 illustrates the layout of four similarly situated devices separated by “streets” which have been formed by etching. Separation of the devices 301 through 304 of FIG. 3 is nominally along the center lines of the streets of that figure.

[0010] In FIGS. 1 and 2, the numbers which identify features of FIG. 1 are also used for the same features in FIG. 2. The features of FIG. 2, which are not illustrated in FIG. 1, are identified with numbers starting at 202.

[0011] The illustrative GaN device of FIGS. 1 and 2 is formed on a sapphire substrate 100. FIG. 2 illustrates the components of the LED as seen at the section line AA of FIG. 1. The LED of FIGS. 1 and 2 comprises: sapphire substrate 100; buffer region 202 for overcoming the lattice mismatch between the sapphire substrate and GaN layers; n cladding layer 203 active region 204, p cladding layer 205, p window region 101; p contact layer 102; p metal contact 103, 104; n contact region 105; and n metal contact 106. The p contact layer 102 along with the p metal contact 103, 104 forms an ohmic contact with the p window region 101. The n contact region 105 along with n metal contact 106 forms an ohmic contact with the n cladding layer 203.

[0012] The elements of the LED which are labeled 101 and 202 through 205, are formed by MOCVD processes. The elements which are labeled 102 through 106 are formed by evaporation. After completion of the MOCVD processing, etching which is controlled by photo lithography, exposes the portion of the n cladding layer on which the n contact assembly 105, 106 is to be formed. A subsequent deep etching step, again under control by photo lithography, opens the “streets” between the individual devices, e.g., between the devices 301 through 304 of FIG. 3. At the same time, the deep isolation trench 107 can be formed. If isolation between the metal contacts is to be provided by an insulator formed by ion implantation, etching of the deep isolation trench is omitted.

[0013] In the illustrative embodiment of FIG. 1, p window region 101 comprises: (a) a first window layer which is formed of GaN doped with Mg; and (b) an overlying second GaN window layer which is more highly doped Mg+. As seen in FIG. 1, the layers of the p window region 101 embrace the entire foot print of the device other than: (a) The surface area defined by circle 103; (b) The surface area defined by rectangle 105, and (c) The surface area of the ditch 107.

[0014] Contact layer 102 is a thin, semi-transparent, conductive layer of NiO_(x)/Au which is deposited over the exposed face of the top layer of region 101. A first opening therein, identified as 103 in FIG. 1, is etched through layer 102 to reach the highly doped layer of window region 101. A Ti metal contact 103 is formed as shown in FIG. 2 to provide adhesion to the exposed surface of window region 101 and to layer 102. Gold contact layer 104 is deposited over the Ti metal contact 103. NiO_(x)/Au layer 102 and Ti metal contact 103 form an ohmic contact with layer 101.

[0015] The n contact region 105 is formed of a number of layers of metals including Ti, Ni, and Al to provide adhesion to n cladding layer 203 and to provide an ohmic contact foundation for deposit of Au contact 106.

[0016] Contact layer 102 tends to spread the current evenly over the underlying surface are of the active region 204. However, the shape and physical relation of the n contact to the remainder of the device, produces a physically small, relatively low impedance path which concentrates the current flowing between the contacts to a limited area of the active region.

[0017] Isolation of metal contacts 104 and 106 by a deep trench 107, or by a similarly located implanted insulator, eliminates the low impedance path between the contacts, and thus permits reduced lateral separation between contacts 104 and 106.

[0018] The “U” shape of semi-transparent conductive layer 102 provides a large light emitting surface; and the “U” shape, in cooperation with the n electrode which is centered in the open end of the “U”, efficiently spreads the activation current throughout the active layer. The parallel legs of the U provide current paths around the isolation means, in both the p cladding layer and the n cladding.

[0019] The invention has been described with particular attention to its preferred embodiment; however, it should be understood that variations and modifications within the spirit and scope of the invention may occur to those skilled in the art to which the invention pertains. For example the metal contacts can be situated either diagonally in opposing corners, or in adjacent corners, of the device with insolation provided there between. Similarly, although the device foot print is a rectangle, a device with a square foot print can accommodate laterally spaced apart metal contacts which are isolated by a deep trench or by an insulator 

1) A semi-conductor light emitting diode structure comprising: a substrate; first and second electrodes laterally spaced apart on same side of the said substrate; and means formed in said diode structure for isolating said electrodes from one and the other. 2) A semi-conductor light emitting diode structure in accordance with claim 1 wherein: said isolating means comprises a trench situated between said electrodes. 3) A light emitting diode structure in accordance with claim 1 wherein: said isolating means comprises an insulator situated between said electrodes. 4) A semi-conductor light emitting diode structure comprising: a sapphire substrate; a GaN based light emitting structure; first and second electrodes laterally spaced apart on same side of the said substrate; and means formed in said diode structure for isolating said electrodes from one and the other. 5) A semi-conductor light emitting diode structure in accordance with claim 4 wherein: said isolating means comprises a trench situated between said electrodes. 6) A semi-conductor light emitting diode structure in accordance with claim 4 wherein: said isolating means comprises an insulator between said electrodes. 7) A semi-conductor light emitting diode in accordance with claim 1 or claim 4 wherein: said first electrode comprises a U shaped semi transparent conductive p contact layer; and a metal p contact centered on the closed end of the U; and said second electrode comprises an n contact layer and a metal n contact centered in the open end of the U. 8) A semi-conductor light emitting diode in accordance with claim 7 wherein: said p contact layer comprises a NiO_(x)/Au layer; and a said metal p contact comprises a Ti layer and an Au layer; and said n contact layer comprises layers of Ti, Ni,and Al; and said metal n contact comprises Au. 